1. Field
Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to a memory controller, and more particularly, to a memory controller controlling an output timing of an error-corrected first chunk, and devices having the memory controller.
2. Description of the Related Art
In a data processing system, data may be changed during transmission. Accordingly, for a reliable data communication, changed data should be detected and corrected. As a method for detecting the changed data, parity check, cyclical redundancy check or checksum is used.
As a method for correcting an error included in the data, there is provided a method that a receiving device requires retransmission of the data from a transmitter or a method that the receiving device corrects an error included in the data automatically by using an error correction code (ECC). A data processing system, which uses a method of correcting an error included in the data, needs time for correcting the error during a read operation, so that performance of the read operation of the data processing system may be deteriorated.